SystemVerilog - 繼承、多型、虛擬方法

2023-09-08
SystemVerilog

繼承 (Inheritance)

Example:

1

Output

# run 10000
# t:0 start  get room id:1
# t:0 finish get room id:1
# t:0 start  get room id:2
# t:5 start  return room id:1
# t:5 finish return room id:1
# t:5 finish get room id:2
# t:15 start  return room id:2
# t:15 finish return room id:2
#  quit -f

多型 (Polymorphism)

虛擬方法 (Virtual Methods)