SystemVerilog - Testbench Example2

2023-08-25
SystemVerilog

這邊的testbench例子的design邏輯很簡單,就是input address跟data,
如果address小於等於0x3F就把address和data輸出到addr_a/data_a,並且把addr_b/data_b清為零,
反之address大於0x3F則把address和data輸出到addr_b/data_b,並且把addr_a/data_a清為零。

主要是練習怎麼把整個testbench串起來

Generator產生DUT的input data
Driver把generate產生的資料透過interface送給DUT
Interface包含了design的所有input/output訊號
Monitor會監控design的input/output
Scoreboard負責check output是不是符合預期
Environment會包含上面所有的component
Test包含了Environment以及一些不同的配置參數可以調整,但這個例子並沒有實際作用
TB top則是包含了DUT,interface和整個Test module,並且會把DUT和Test用interface串起來然後輸入clock和把test跑起來

以下是完整的testbench例子

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parameter ADDR_WIDTH = 8;
parameter DATA_WIDTH = 16;
parameter ADDR_DIV = 8'h3F;

// Design
module switch
( input clk,
input rstn,
input vld,

input [ADDR_WIDTH-1:0] addr,
input [DATA_WIDTH-1:0] data,

output reg [ADDR_WIDTH-1:0] addr_a,
output reg [DATA_WIDTH-1:0] data_a,

output reg [ADDR_WIDTH-1:0] addr_b,
output reg [DATA_WIDTH-1:0] data_b
);

always @ (posedge clk) begin
if (!rstn) begin
addr_a <= 0;
data_a <= 0;
addr_b <= 0;
data_b <= 0;
end
else begin
if (vld) begin
if (addr >= 0 & addr <= ADDR_DIV) begin
addr_a <= addr;
data_a <= data;
addr_b <= 0;
data_b <= 0;
$display ("1[design] T:%0t addr:0x%0h data:0x%0h addr_a:0x%0h data_a:0x%0h addr_b:0x%0h data_b:0x%0h",
$time, addr, data, addr_a, data_a, addr_b, data_b);
end
else begin
addr_a <= 0;
data_a <= 0;
addr_b <= addr;
data_b <= data;
$display ("2[design] T:%0t addr:0x%0h data:0x%0h addr_a:0x%0h data_a:0x%0h addr_b:0x%0h data_b:0x%0h",
$time, addr, data, addr_a, data_a, addr_b, data_b);
end
end
end
end
endmodule


// Transaction Object
class switch_item;
bit[ADDR_WIDTH-1:0] addr;
bit[DATA_WIDTH-1:0] data;

bit [ADDR_WIDTH-1:0] addr_a;
bit [DATA_WIDTH-1:0] data_a;
bit [ADDR_WIDTH-1:0] addr_b;
bit [DATA_WIDTH-1:0] data_b;

function void rand_val();
this.addr = $urandom_range(0, (2**ADDR_WIDTH)-1);
this.addr = (this.addr/8)*8;
this.data = $urandom_range(0, (2**DATA_WIDTH)-1);
endfunction

function void display_val(string tag = "");
$display ("[transaction] T:%0t %s addr:0x%0h data:0x%0h addr_a:0x%0h data_a:0x%0h addr_b:0x%0h data_b:0x%0h",
$time, tag, addr, data, addr_a, data_a, addr_b, data_b);
endfunction
endclass

interface switch_if(input bit clk);
logic rstn;
logic vld;

logic [ADDR_WIDTH-1:0] addr;
logic [DATA_WIDTH-1:0] data;

logic [ADDR_WIDTH-1:0] addr_a;
logic [DATA_WIDTH-1:0] data_a;

logic [ADDR_WIDTH-1:0] addr_b;
logic [DATA_WIDTH-1:0] data_b;
endinterface

class generator;
mailbox mbx;
event drv_event;
function new(mailbox mbx, event drv_event);
this.mbx = mbx;
this.drv_event = drv_event;
endfunction

task run();
$display("generator running");
for (int i = 0; i < 20; i++) begin
switch_item item = new();
item.rand_val();
item.display_val();
mbx.put(item);
@(drv_event);
end

$display("generator done");
endtask
endclass

class driver;
mailbox mbx;
event drv_event;
virtual switch_if vif;

function new(mailbox mbx, event drv_event);
this.mbx = mbx;
this.drv_event = drv_event;
endfunction

task run();
$display("driver running");
// @(posedge vif.clk);

$display("drv detect clk rising");
forever begin
switch_item item;
@(posedge vif.clk);
mbx.get(item);
item.display_val("driver");
vif.addr <= item.addr;
vif.data <= item.data;
vif.vld <= 1;
$display("t:%0t drv detect clk rising", $time());
->drv_event;

// @(negedge vif.clk);
#1
vif.vld <= 0;

#1
vif.vld <= 1;
end
endtask
endclass

class scoreboard;
mailbox mbx;
function new(mailbox mbx);
this.mbx = mbx;
endfunction

task run();
$display("scoreboard running");
forever begin
switch_item item;
mbx.get(item);

if (item.addr inside {[0:'h3f]}) begin
if (item.addr_a != item.addr | item.data_a != item.data)
$display ("T:%0t [scoreboard] ERROR addr:0x%0h data:0x%0h addr_a:0x%0h data_a:0x%0h", $time, item.addr, item.data, item.addr_a, item.data_a);
else
$display ("T:%0t [scoreboard] PASS addr:0x%0h data:0x%0h addr_a:0x%0h data_a:0x%0h", $time, item.addr, item.data, item.addr_a, item.data_a);
end
else begin
if (item.addr_b != item.addr | item.data_b != item.data)
$display ("T:%0t [scoreboard] ERROR addr:0x%0h data:0x%0h addr_b:0x%0h data_b:0x%0h", $time, item.addr, item.data, item.addr_b, item.data_b);
else
$display ("T:%0t [scoreboard] PASS addr:0x%0h data:0x%0h addr_b:0x%0h data_b:0x%0h", $time, item.addr, item.data, item.addr_b, item.data_b);
end
end
endtask
endclass

class monitor;
mailbox mbx;
virtual switch_if vif;
semaphore sema4;

function new(mailbox mbx);
this.mbx = mbx;
sema4 = new(1);
endfunction

task run();
$display("t:%0t monitor running", $time);
forever begin
switch_item item;
@(posedge vif.clk);
if (vif.clk && vif.vld) begin
item = new();
item.addr = vif.addr;
item.data = vif.data;

@(posedge vif.clk);
item.addr_a = vif.addr_a;
item.data_a = vif.data_a;
item.addr_b = vif.addr_b;
item.data_b = vif.data_b;
mbx.put(item);
$display ("T=%0t monitor put data to scoreboard", $time);
end
end
endtask
endclass

class environment;

driver driver0;
generator generator0;
event drv_event;

monitor monitor0;
scoreboard scoreboard0;

mailbox drv_mbx;
mailbox scb_mbx;

virtual switch_if vif; // Virtual interface handle

function new();
drv_mbx = new();
scb_mbx = new();

driver0 = new(drv_mbx, drv_event);
generator0 = new(drv_mbx, drv_event);

monitor0 = new(scb_mbx);
scoreboard0 = new(scb_mbx);
endfunction

task run();
$display("env running");
monitor0.vif = vif;
driver0.vif = vif;

fork
driver0.run();
generator0.run();
monitor0.run();
scoreboard0.run();
join
endtask
endclass

class test;
environment env0;

function new();
env0 = new();
endfunction

task run();
$display("test running");
env0.run();
endtask
endclass


// TB top
module tb;
// switch_item item;
bit clk;
always #10 clk = ~clk;

switch_if if0(clk);
switch dut( .clk(if0.clk),
.rstn(if0.rstn),
.vld(if0.vld),
.addr(if0.addr),
.data(if0.data),
.addr_a(if0.addr_a),
.data_a(if0.data_a),
.addr_b(if0.addr_b),
.data_b(if0.data_b));
test t0;

int i = 0;

switch_item item;

initial begin
$display("tb top running");
clk <= 0;
if0.rstn <= 1;
t0 = new();
t0.env0.vif = if0; // important
t0.run();
#10 if0.rstn <= 1;

$display("tb top finished");
#200 $finish();
end
endmodule

Output

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# tb top running
# test running
# env running
# driver running
# drv detect clk rising
# generator running
# [transaction] T:0 addr:0xd8 data:0x9f07 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:0 monitor running
# scoreboard running
# [transaction] T:10 driver addr:0xd8 data:0x9f07 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:10 drv detect clk rising
# [transaction] T:10 addr:0xc8 data:0x9490 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:30 addr:0xd8 data:0x9f07 addr_a:0xx data_a:0xx addr_b:0xx data_b:0xx
# [transaction] T:30 driver addr:0xc8 data:0x9490 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:30 drv detect clk rising
# [transaction] T:30 addr:0x98 data:0xfbac addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:50 addr:0xc8 data:0x9490 addr_a:0x0 data_a:0x0 addr_b:0xd8 data_b:0x9f07
# [transaction] T:50 driver addr:0x98 data:0xfbac addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:50 drv detect clk rising
# T=50 monitor put data to scoreboard
# [transaction] T:50 addr:0x88 data:0x5ad4 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:50 [scoreboard] PASS addr:0xd8 data:0x9f07 addr_b:0xd8 data_b:0x9f07
# 2[design] T:70 addr:0x98 data:0xfbac addr_a:0x0 data_a:0x0 addr_b:0xc8 data_b:0x9490
# [transaction] T:70 driver addr:0x88 data:0x5ad4 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:70 drv detect clk rising
# [transaction] T:70 addr:0xd0 data:0xea9a addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:90 addr:0x88 data:0x5ad4 addr_a:0x0 data_a:0x0 addr_b:0x98 data_b:0xfbac
# [transaction] T:90 driver addr:0xd0 data:0xea9a addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:90 drv detect clk rising
# T=90 monitor put data to scoreboard
# [transaction] T:90 addr:0x60 data:0xd5d7 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:90 [scoreboard] PASS addr:0x98 data:0xfbac addr_b:0x98 data_b:0xfbac
# 2[design] T:110 addr:0xd0 data:0xea9a addr_a:0x0 data_a:0x0 addr_b:0x88 data_b:0x5ad4
# [transaction] T:110 driver addr:0x60 data:0xd5d7 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:110 drv detect clk rising
# [transaction] T:110 addr:0x20 data:0x5381 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:130 addr:0x60 data:0xd5d7 addr_a:0x0 data_a:0x0 addr_b:0xd0 data_b:0xea9a
# [transaction] T:130 driver addr:0x20 data:0x5381 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:130 drv detect clk rising
# T=130 monitor put data to scoreboard
# [transaction] T:130 addr:0x68 data:0xa3ba addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:130 [scoreboard] PASS addr:0xd0 data:0xea9a addr_b:0xd0 data_b:0xea9a
# 1[design] T:150 addr:0x20 data:0x5381 addr_a:0x0 data_a:0x0 addr_b:0x60 data_b:0xd5d7
# [transaction] T:150 driver addr:0x68 data:0xa3ba addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:150 drv detect clk rising
# [transaction] T:150 addr:0x88 data:0x7561 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:170 addr:0x68 data:0xa3ba addr_a:0x20 data_a:0x5381 addr_b:0x0 data_b:0x0
# [transaction] T:170 driver addr:0x88 data:0x7561 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:170 drv detect clk rising
# T=170 monitor put data to scoreboard
# [transaction] T:170 addr:0xf8 data:0x181b addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:170 [scoreboard] PASS addr:0x20 data:0x5381 addr_a:0x20 data_a:0x5381
# 2[design] T:190 addr:0x88 data:0x7561 addr_a:0x0 data_a:0x0 addr_b:0x68 data_b:0xa3ba
# [transaction] T:190 driver addr:0xf8 data:0x181b addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:190 drv detect clk rising
# [transaction] T:190 addr:0x68 data:0x1d0f addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:210 addr:0xf8 data:0x181b addr_a:0x0 data_a:0x0 addr_b:0x88 data_b:0x7561
# [transaction] T:210 driver addr:0x68 data:0x1d0f addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:210 drv detect clk rising
# T=210 monitor put data to scoreboard
# [transaction] T:210 addr:0x78 data:0x2588 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:210 [scoreboard] PASS addr:0x88 data:0x7561 addr_b:0x88 data_b:0x7561
# 2[design] T:230 addr:0x68 data:0x1d0f addr_a:0x0 data_a:0x0 addr_b:0xf8 data_b:0x181b
# [transaction] T:230 driver addr:0x78 data:0x2588 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:230 drv detect clk rising
# [transaction] T:230 addr:0x88 data:0x8f30 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:250 addr:0x78 data:0x2588 addr_a:0x0 data_a:0x0 addr_b:0x68 data_b:0x1d0f
# [transaction] T:250 driver addr:0x88 data:0x8f30 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:250 drv detect clk rising
# T=250 monitor put data to scoreboard
# [transaction] T:250 addr:0x8 data:0xb4f8 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:250 [scoreboard] PASS addr:0x68 data:0x1d0f addr_b:0x68 data_b:0x1d0f
# 2[design] T:270 addr:0x88 data:0x8f30 addr_a:0x0 data_a:0x0 addr_b:0x78 data_b:0x2588
# [transaction] T:270 driver addr:0x8 data:0xb4f8 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:270 drv detect clk rising
# [transaction] T:270 addr:0xd8 data:0x4221 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 1[design] T:290 addr:0x8 data:0xb4f8 addr_a:0x0 data_a:0x0 addr_b:0x88 data_b:0x8f30
# [transaction] T:290 driver addr:0xd8 data:0x4221 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:290 drv detect clk rising
# T=290 monitor put data to scoreboard
# [transaction] T:290 addr:0x30 data:0x3b79 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:290 [scoreboard] PASS addr:0x88 data:0x8f30 addr_b:0x88 data_b:0x8f30
# 2[design] T:310 addr:0xd8 data:0x4221 addr_a:0x8 data_a:0xb4f8 addr_b:0x0 data_b:0x0
# [transaction] T:310 driver addr:0x30 data:0x3b79 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:310 drv detect clk rising
# [transaction] T:310 addr:0x88 data:0xf6a5 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 1[design] T:330 addr:0x30 data:0x3b79 addr_a:0x0 data_a:0x0 addr_b:0xd8 data_b:0x4221
# [transaction] T:330 driver addr:0x88 data:0xf6a5 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:330 drv detect clk rising
# T=330 monitor put data to scoreboard
# [transaction] T:330 addr:0x58 data:0xc181 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:330 [scoreboard] PASS addr:0xd8 data:0x4221 addr_b:0xd8 data_b:0x4221
# 2[design] T:350 addr:0x88 data:0xf6a5 addr_a:0x30 data_a:0x3b79 addr_b:0x0 data_b:0x0
# [transaction] T:350 driver addr:0x58 data:0xc181 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:350 drv detect clk rising
# [transaction] T:350 addr:0x88 data:0x5de4 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# 2[design] T:370 addr:0x58 data:0xc181 addr_a:0x0 data_a:0x0 addr_b:0x88 data_b:0xf6a5
# [transaction] T:370 driver addr:0x88 data:0x5de4 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:370 drv detect clk rising
# T=370 monitor put data to scoreboard
# [transaction] T:370 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# T:370 [scoreboard] PASS addr:0x88 data:0xf6a5 addr_b:0x88 data_b:0xf6a5
# 2[design] T:390 addr:0x88 data:0x5de4 addr_a:0x0 data_a:0x0 addr_b:0x58 data_b:0xc181
# [transaction] T:390 driver addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0x0 data_b:0x0
# t:390 drv detect clk rising
# generator done
# 2[design] T:410 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0x88 data_b:0x5de4
# T=410 monitor put data to scoreboard
# T:410 [scoreboard] PASS addr:0x88 data:0x5de4 addr_b:0x88 data_b:0x5de4
# 2[design] T:430 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:450 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=450 monitor put data to scoreboard
# T:450 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:470 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:490 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=490 monitor put data to scoreboard
# T:490 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:510 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:530 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=530 monitor put data to scoreboard
# T:530 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:550 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:570 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=570 monitor put data to scoreboard
# T:570 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:590 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:610 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=610 monitor put data to scoreboard
# T:610 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:630 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:650 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=650 monitor put data to scoreboard
# T:650 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:670 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:690 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=690 monitor put data to scoreboard
# T:690 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:710 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:730 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=730 monitor put data to scoreboard
# T:730 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:750 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:770 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=770 monitor put data to scoreboard
# T:770 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:790 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:810 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=810 monitor put data to scoreboard
# T:810 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:830 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:850 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=850 monitor put data to scoreboard
# T:850 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:870 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:890 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=890 monitor put data to scoreboard
# T:890 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:910 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:930 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=930 monitor put data to scoreboard
# T:930 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:950 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# 2[design] T:970 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# T=970 monitor put data to scoreboard
# T:970 [scoreboard] PASS addr:0xe8 data:0xba91 addr_b:0xe8 data_b:0xba91
# 2[design] T:990 addr:0xe8 data:0xba91 addr_a:0x0 data_a:0x0 addr_b:0xe8 data_b:0xba91
# quit -f